1. Related Applications
This application is related to U.S. patent application Ser. No. 08/034,561, filed Mar. 19, 1993, entitled "Method and Apparatus for Implementing a Common mode Level Shift in a Bus Transceiver Incorporating a High-speed Binary Data Transfer mode with a Ternary Control Transfer mode", which is assigned to the assignee of rights to the present application and which is incorporated by reference herein.
2. Field of the Invention
The CMOS generally relates to class AB amplifiers or buffers and in particular to a class AB amplifier for use as a voltage bias within a bus transceiver configured according to IEEE P1394 specifications.
3. Description of Related Art
One common class of amplifiers are class AB amplifiers. Class AB amplifiers are employed particularly where it is desirable to have a low quiescent current, such as for low power computer applications including portable or notebook computers. A class AB amplifier may consume, for example, only 0.5 milliamps of current in the quiescent state while providing 9 milliamps of current on demand.
In certain applications, it is desirable to provide a class AB amplifier which not only provides low quiescent current but also achieves rail to rail output swings when current is required. An example of such a class AB amplifier is described in "A Quad CMOS Single Supply Amplifier with Rail to Rail Output Swing", D. M. Monticelli, IEEE J. Solid-state Circuits, Vol. SC-21, pp. 1026-1034, December, 1986. Although the amplifier described by Monticelli achieves rail to rail output swings as well as a low quiescent current, it requires a rather complicated circuit topology. The complicated topology arises, in part, from the need to provide a compensation node within the amplifier. The compensation node is implemented by providing an internal capacitive load within the amplifier. However, for certain applications, such as driving large capacitive loads, it is desirable to achieve the highest possible switching speed for nodes within the amplifier.
The internal capacitive node within the amplifier of Monticelli, which is provided to achieve compensation, results in relatively low switching speeds for large capacitive loads.
Moreover, the circuit topology of Monticelli employs bipolar junction transistors which, in general, are poorly characterized devices in standard CMOS digital processes. More specifically, the Monticelli amplifier uses complex input drive circuits and bias circuits for its output stage. A first stage with a single-ended output drives the class AB output stage with a single-ended input through an intermediary single-ended amplifier stage. The presence of the intermediary stage introduces significant poles in the overall frequency transfer characteristic of the amplifier and requires the use of elaborate additional stabilization circuits. To guarantee the overall frequency stability of the amplifier at least some of the active devices used by the intermediary amplifier stage must be bipolar junction transistors.
It would be desirable to provide a class AB amplifier requiring only a low quiescent current for use in connection with a large external load capacitance. It would also be desirable to provide such a class AB amplifier configured such that it avoids the use of bipolar junction transistors and is thereby completely compatible with standard digital CMOS processes. It is to these ends that certain aspects of the present invention are drawn.
One application requiring a class AB amplifier having low quiescent current, as well as high switching speeds, is an amplifier for use as a voltage bias in a bus transceiver configured in accordance with IEEE P1394 specifications. IEEE P1394 provides the specifications for a computer bus system, also referred to as "Firewire", for interconnecting computer components such as modems, laser printers, lap-top computers and the like. In accordance with IEEE P1394 specifications, each node of the bus system includes an integrated circuit bus transceiver chip which allows communication to other nodes. An external decoupling capacitance is provided in connection with each bus transceiver integrated chip. Each bus transceiver requires a voltage bias source, such as an operational amplifier, for biasing up twisted pair interconnection lines. Low quiescent current is desirable for such a voltage bias source since the bus transceiver chip incorporating the voltage bias source may be provided within battery powered computer elements such as notebook computers and the like. Also, it is desirable for the voltage bias source to be able to operate with a low voltage power supply such as a 3 volt power supply.
Moreover, an amplifier for use within a system configured in accordance with IEEE P1394 specifications must have very high power efficiency. The great majority of the time the amplifier is idle, i.e. the amplifier has no significant output current demand, and, as such, must use only a minimum amount of current from the power supply. When active, the amplifier is required to provide a large output current to drive capacitive and resistive loads. These considerations place significant constraints on the selection of the circuit topology for the amplifier. An improved amplifier of the type described above for use in a system providing the external decoupling capacitance would be highly advantageous. Accordingly, aspects of the invention are drawn to the provision of an improved amplifier within a bus transceiver, particularly one configured according to IEEE P1394 specifications.
A common problem in conventional class AB amplifiers is that the amplifiers are not current limiting and therefore may output a continuous high current in the event of a short circuit. Such a short circuit may occur, between two adjacent communication nodes connected in an IEEE P1394 configuration, when one of the two nodes is powered down. In some circuits, the high output current occurring as a result of the short circuit may permanently damage other components of the circuit or other devices connected to the circuit or cause the batteries to run down. Accordingly, it would also be desirable to provide an improved class AB amplifier of the type described above but having a circuit topology which achieves current limiting, wherein the amount of current output from the amplifier is limited even upon the occurrence of a short circuit.